The applet models a four-discriminator digital IFM receiver or a four-baseline multiple interferometer. With due consideration extension to less or greater numbers of discriminators is feasible.
The Discriminator x-line or phase ratios are set up in the text boxes and entered by clicking the Enter button or keyboard Return key.
Discriminator digitization levels of the video vectors are set up using the drop-down menus to select the number of bits. To cope with non-binary quantization some bracketed entries list number of quantized increments in 360°
Basic Ambiguity Tolerance of each discriminator is returned at the bottom of the display by clicking the Enter button or keyboard Return key.
The upper plot shows the apparent phase margins between pairs of discriminator quantized vectors.Given actual phase errors in the discriminators, the true margins are derived by increasing each Discriminator Offset (phase error) until the displayed margins are reduced to zero. The Running quantized vector Margin is displayed by adjusting the Primary Phase (first discriminator) using the left-hand scrollbar. This margin is often much larger than the Basic Tolerance that represents the minimum and can sometimes be less, but once it becomes negative, ambiguities can no longer be resolved. Colored spots on the plots highlight the corresponding phases on other discriminators.
The lower display is a clock representaion of the four discriminator phase vectors. Below the clock displays are indicated the vector true and modulus-360 phases.
The data panels at the bottom allow:

The basic tolerance values are accurate for integer disciminator ratios, but provide worst-case values for nonintegers, since actual tolerance depends on discriminator phasing over restricted operating ranges.

User Notes:
In the default case, increasing the second discriminator x4 discriminator phase offset error to 22°, the corresponding phase margin (magenta) in the upper display just touches the zero line indicating that an ambiguity breakdown would just occur for discriminators x4 and x16.
Alternate positive and negative discriminator phase error offsets set the worst-case design conditions.
If the delay ratio x of the first discriminator is set to an integer greater than 1, x3 for instance, the combined unambiguous range remains equivalent to that of a virtual x1 delay component with a corresponding reduction of ambiguity tolerance.