The applet illustrates the operation and accuracy performance of a circular antenna array driving a Butler matrix. All outputs and phase modes can be examined to infer DF accuracy and bandwidth limitations.
The displayed data shows the amplitude-azimuth and phase-azimuth variation of three modes selected using the pairs of drop-down boxes labelled Red, Blue, and Gray at the bottom of the applet.
The mode amplitude displayed is relative to the power that would be received by single antenna of 0 dB gain. Modeled array element gain depends upon azimuth aperture and its elevation beamwidth and assumes 100% efficiency.
The amplitude data corresponds to the mode selected in the first box of each pair and the phase data displayed corresponds to the mode differences entered in the box pair.
The tabled (Mode Error) data summarizes the statistical bearing errors of the mode differences selected in the Mode Diff: boxes.
Parameters adjustable via scrollbars are: array radius (array center to element phase center), elevation beamwidth, number of ports, signal frequency, source elevation, and mismatch loss.
The applet Mismatch Loss scrollbar introduces value-proportional random amplitude and phase errors in the matrix inputs.
The upper drop-down menu selects between antenna patterns having frequency dependent beamwidths, based on their aperture, or an omnidirectional feed.
Moving the mouse in plot regions produces a readout of the plotted values related to the x-axis azimuth mouse position.
Mouse-clicking the Clear button loads a new set of random amplitude/phase error components within the scrollbar setting.

User Notes:
Mismatch loss between the antenna elements, the matrix inputs, and within the matrix always occurs in practice.
The reflected powers cause amplitude and phase errors that impact on the accuracy of all the mode outputs.
The operating bandwidth is determined by the amplitude balance and phase errors tolerated by a system design.
Element spacing should be kept below half a wavelength, but with larger numbers of ports this limit can be stretched.
The number of ports is restricted to powers of two in keeping with simplifying matrix balance and design.